U
    `a[I                     @   s   d Z ddlZddlmZmZmZmZmZmZ ddl	m
Z
mZmZmZmZmZmZmZmZ dddgZG dd deZG d	d deZG d
d deZdS )z
    pygments.lexers.hdl
    ~~~~~~~~~~~~~~~~~~~

    Lexers for hardware descriptor languages.

    :copyright: Copyright 2006-2017 by the Pygments team, see AUTHORS.
    :license: BSD, see LICENSE for details.
    N)
RegexLexerbygroupsincludeusingthiswords)	TextCommentOperatorKeywordNameStringNumberPunctuationErrorVerilogLexerSystemVerilogLexer	VhdlLexerc                   @   s  e Zd ZdZdZddgZdgZdgZdZde	j
dfd	efd
efdefde	jfde	jfdefdedfdejfdejfdejfdejfdejfdejfdejfdefdejfdefdefdefdejfdeeejefdeeejed fed!d"d#efed$d%d"d&e	j
fed'd(d"d&ejfed)d"d#ej fd*ej!fd+efgd,ed-fd.ej"fd/efdefd0efgd1e	j
fd2e	jfd3e	jd-fd4e	j
fd5e	j
fd	e	j
d-fgd6ejd-fgd7Z#d8d9 Z$d:S );r   zZ
    For verilog source code with preprocessor directives.

    .. versionadded:: 1.4
    Zverilogvz*.vztext/x-verilog(?:\s|//.*?\n|/[*].*?[*]/)+^\s*`definemacro\n\s+\\\n/(\\\n)?/(\n|(.|\n)*?[^\\]\n)/(\\\n)?[*](.|\n)*?[*](\\\n)?/[{}#@]L?"string4L?'(\\.|\\[0-7]{1,3}|\\x[a-fA-F0-9]{1,2}|[^\\\'\n])'%(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+[lL]?(\d+\.\d*|\.\d+|\d+[fF])[fF]?([0-9]+)|(\'h)[0-9a-fA-F]+([0-9]+)|(\'b)[01]+([0-9]+)|(\'d)[0-9]+([0-9]+)|(\'o)[0-7]+\'[01xz]\d+[Ll]?\*/[~!%^&*+=|?:<>/-][()\[\],.;\']`[a-zA-Z_]\w*^(\s*)(package)(\s+)^(\s*)(import)(\s+)import)qalwaysalways_comb	always_ffalways_latchandassign	automaticbeginbreakbufbufif0bufif1casecasexcasezcmosconstcontinuedeassigndefaultdefparamdisabledoedgeelseendendcaseendfunctionendgenerate	endmodule
endpackageendprimitive
endspecifyendtableendtaskenumeventfinalforforceforeverforkfunctiongenerategenvarhighz0highz1ifinitialinoutinputintegerjoinlarge
localparammacromodulemediummodulenandnegedgenmosnornotnotif0notif1oroutputpacked	parameterpmosposedge	primitivepull0pull1pulldownpulluprcmosrefreleaserepeatreturnrnmosrpmosrtranrtranif0rtranif1scalaredsignedsmallspecify	specparamZstrengthr   strong0strong1structtabletasktrantranif0tranif1typetypedefunsignedvarvectoredvoidwaitweak0weak1whilexnorxor\bsuffix)Z
accelerateZautoexpand_vectornetsZ
celldefineZdefault_nettyperH   elsifZendcelldefineZendifZ
endprotectZendprotectedZexpand_vectornetsZifdefZifndefr   ZnoaccelerateZnoexpand_vectornetsZnoremove_gatenamesZnoremove_netnamesZnounconnected_driveZprotect	protectedZremove_gatenamesZremove_netnamesZresetallZ	timescaleZunconnected_driveZundef`)prefixr   )4bitsZ
bitstorealZbitstoshortrealZcountdriversZdisplayZfcloseZfdisplayZfinishZfloorZfmonitorZfopenZfstrobeZfwriteZ
getpatternhistoryZincsaverb   ZitorkeylistlogZmonitorZ
monitoroffZ	monitoronZnokeyZnologZprinttimescaleZrandomZreadmembZreadmemhrealtimeZ
realtobitsresetZreset_countZreset_valueZrestartZrtoiZsaveZscaleZscopeZshortrealtobitsZ
showscopesZshowvariablesZshowvarsZ	sreadmembZ	sreadmemhZstimestopZstrobetimeZ
timeformatwritez\$byteshortintintlongintrc   r   bitlogicregsupply0supply1tritriandtriortri0tri1trireguwirewirewandZwoshortrealrealr   [a-zA-Z_]\w*:(?!:)\$?[a-zA-Z_]\w*"#pop/\\([\\abfnrtv"\']|x[a-fA-F0-9]{2,4}|[0-7]{1,3})	[^\\"\n]+\\[^/\n]+/[*](.|\n)*?[*]///.*?\n/	(?<=\\)\n	[\w:]+\*?)rootr   r   r/   c                 c   s>   t | |D ],\}}}|tkr,| r,tj}|||fV  qd S Nr   get_tokens_unprocessedr   isupperConstantselftextindextokenvalue r   5/usr/lib/python3/dist-packages/pygments/lexers/hdl.pyr      s    
z#VerilogLexer.get_tokens_unprocessedN)%__name__
__module____qualname____doc__namealiases	filenames	mimetypes_wsr	   Preprocr   Single	Multiliner   r   Charr   FloatHexBinIntegerOctr   r
   r   r   r   r   	Namespacer   BuiltinTypeLabelEscapetokensr   r   r   r   r   r      s   
 
	 
O

	
cc                   @   s  e Zd ZdZdZddgZddgZdgZdZde	j
d	fd
eeejefdeeejedfdefdefdefde	jfde	jfdefdedfdejfdejfdejfdejfdejfdejfdejfdefdejfdefdefd efd!ejfed"d#d$efed%d#d$e	j
fed&d#d$ejfd'eeed(fed)d#d$ej fd*ej!fd+efgd,ej"d-fgd.ed-fd/ej#fd0efdefd1efgd2e	j
fd3e	jfd4e	jd-fd5e	j
fd6e	j
fde	j
d-fgd7ejd-fgd8Z$d9d: Z%d;S )<r   z
    Extends verilog lexer to recognise all SystemVerilog keywords from IEEE
    1800-2009 standard.

    .. versionadded:: 1.5
    ZsystemverilogZsvz*.svz*.svhztext/x-systemverilogr   r   r   r-   r.   r/   r   r   r   r   r   r   r   r   r    r!   r"   r#   r$   r%   r&   r'   r(   r)   r*   r+   r,   )Z	accept_onaliasr0   r1   r2   r3   r4   assertr5   Zassumer6   Zbeforer7   ZbindZbinsZbinsofr   r8   r9   r:   r;   r   r<   r=   r>   ZcellZchandleZcheckerclassZclockingr?   Zconfigr@   Z
constraintcontextrA   ZcoverZ
covergroupZ
coverpointZcrossrB   rC   rD   ZdesignrE   ZdistrF   rG   rH   rI   rJ   Z
endcheckerZendclassZendclockingZ	endconfigrK   rL   ZendgroupZendinterfacerM   rN   rO   Z
endprogramZendpropertyZendsequencerP   rQ   rR   rS   rT   Z
eventuallyZexpectZexportZextendsZexternrU   Zfirst_matchrV   rW   ZforeachrX   rY   ZforkjoinrZ   r[   r\   globalr]   r^   r_   ZiffZifnoneZignore_binsZillegal_binsZimpliesr/   Zincdirr   r`   ra   rb   Zinsideinstancer   rc   Z	interfaceZ	intersectrd   Zjoin_anyZ	join_nonere   ZletZliblistlibraryZlocalrf   r   r   rg   Zmatchesrh   Zmodportri   rj   rk   newZnexttimerl   rm   Znoshowcancelledrn   ro   rp   nullrq   rr   packagers   rt   ru   rv   rw   ZpriorityZprogrampropertyr   rx   ry   rz   r{   Zpulsestyle_ondetectZpulsestyle_oneventpureZrandZrandcZrandcaseZrandsequencer|   r   r   r}   r   Z	reject_onr~   r   Zrestrictr   r   r   r   r   r   Zs_alwaysZs_eventuallyZ
s_nexttimeZs_untilZs_until_withr   Zsequencer   Z	shortrealZshowcancelledr   r   Zsolver   r   Zstaticr   Zstrongr   r   r   superr   r   Zsync_accept_onZsync_reject_onr   Ztaggedr   r   Z
throughoutr   ZtimeprecisionZtimeunitr   r   r   r   r   r   r   r   r   r   r   unionuniqueZunique0r   untilZ
until_withZuntypeduser   r   r   Zvirtualr   r   Z
wait_orderr   Zweakr   r   r   Zwildcardr   withZwithinZworr   r   r   r   )z	`__FILE__z	`__LINE__z`begin_keywordsz`celldefinez`default_nettypez`definez`elsez`elsifz`end_keywordsz`endcelldefinez`endifz`ifdefz`ifndefz`includez`linez`nounconnected_drivez`pragmaz	`resetallz
`timescalez`unconnected_drivez`undefz`undefineall)Lz$displayz	$displaybz	$displayhz	$displayoz$dumpallz	$dumpfilez
$dumpflushz
$dumplimitz$dumpoffz$dumponz
$dumpportsz$dumpportsallz$dumpportsflushz$dumpportslimitz$dumpportsoffz$dumpportsonz	$dumpvarsz$fclosez	$fdisplayz
$fdisplaybz
$fdisplayhz
$fdisplayoz$feofz$ferrorz$fflushz$fgetcz$fgetsz$finishz	$fmonitorz
$fmonitorbz
$fmonitorhz
$fmonitoroz$fopenz$freadz$fscanfz$fseekz$fstrobez	$fstrobebz	$fstrobehz	$fstrobeoz$ftellz$fwritez$fwritebz$fwritehz$fwriteoz$monitorz	$monitorbz	$monitorhz	$monitoroz$monitoroffz
$monitoronz	$plusargsz$randomz	$readmembz	$readmemhz$rewindz$sformatz	$sformatfz$sscanfz$strobez$strobebz$strobehz$strobeoz$swritez$swritebz$swritehz$swriteoz$testz$ungetcz$value$plusargsz$writez$writebz$writehz
$writemembz
$writememhz$writeoz(class)(\s+)	classnamer   r   r   z[a-zA-Z_]\w*r   r   r   r   r   r   r   r   r   r   r   )r   r	  r   r   r/   c                 c   s>   t | |D ],\}}}|tkr,| r,tj}|||fV  qd S r   r   r   r   r   r   r     s    
z)SystemVerilogLexer.get_tokens_unprocessedN)&r   r   r   r   r   r   r   r   r   r	   r   r   r   r   r   r   r   r   r   r   r   r   r   r   r   r   r   r
   r   r   r   r   r   r   Classr   r   r   r   r   r   r   r      s   
 !#a


	
xc                   @   s  e Zd ZdZdZdgZddgZdgZej	ej
B Zdefdefdefd	ejfd
ejfdefdejfdefdefdeeeejfdeeeefdeeeejefdeeeejfdeejejfedddejfdeeeejfdeeeejeeeejee	fdeejeeefdeeeedfedededdefgeddejfd efd!ed"fged#ddejfged$ddefgd%ejfd&ejfd'ej fd(ej!fd)ej"fd*ej#fgd+Z$d,S )-r   z:
    For VHDL source code.

    .. versionadded:: 1.5
    Zvhdlz*.vhdlz*.vhdztext/x-vhdlr   r   r   z--.*?$z'(U|X|0|1|Z|W|L|H|-)'r*   z
'[a-z_]\w*r+   z"[^\n\\"]*"z(library)(\s+)([a-z_]\w*)z(use)(\s+)(entity)z(use)(\s+)([a-z_][\w.]*\.)(all)z(use)(\s+)([a-z_][\w.]*)z(std|ieee)(\.[a-z_]\w*))ZstdZieeeZworkr   r   z"(entity|component)(\s+)([a-z_]\w*)zN(architecture|configuration)(\s+)([a-z_]\w*)(\s+)(of)(\s+)([a-z_]\w*)(\s+)(is)z ([a-z_]\w*)(:)(\s+)(process|for)z
(end)(\s+)endblocktypeskeywordsnumbersz	[a-z_]\w*z(\s+);r   )Zbooleanr   	characterZseverity_levelrc   r   Zdelay_lengthZnaturalZpositiver   Z
bit_vectorZfile_open_kindZfile_open_statusZ
std_ulogicZstd_ulogic_vectorZ	std_logicZstd_logic_vectorr   r   )_absaccessZafterr   allr4   ZarchitectureZarrayr   Z	attributer7   blockZbodybufferZbusr<   Z	componentZconfigurationZconstantZ
disconnectZdowntorH   r   rI   ZentityexitfilerV   rZ   r[   ZgenericgroupZguardedr_   ZimpureinZinertialra   isZlabelr   ZlinkageliteralZloopmapmodrj   r   nextrm   rn   r   ZofZonopenrq   Zothersoutr   ZportZ	postponedZ	procedureZprocessr  rangerecordregisterZrejectZremr   ZrolZrorZselectZseveritysignalZsharedZslaZsllZsraZsrlZsubtypeZthentoZ	transportr   Zunitsr  r  Zvariabler   Zwhenr   r  r   r   z\d{1,2}#[0-9a-f_]+#?z\d+z(\d+\.\d*|\.\d+|\d+)E[+-]?\d+zX"[0-9a-f_]+"z
O"[0-7_]+"z	B"[01_]+")r   r  r  r  r  N)%r   r   r   r   r   r   r   r   re	MULTILINE
IGNORECASEflagsr   r	   r   r   r   r
   r   Z	Attributer   r   r   r   r   r
  r   r   r   r   r   r   r   r   r   r   r   r   r   r   r   r   !  s   
  '	)r   r&  Zpygments.lexerr   r   r   r   r   r   Zpygments.tokenr   r	   r
   r   r   r   r   r   r   __all__r   r   r   r   r   r   r   <module>   s   
 ,
{ 